Electronics and Instrumentation Engineering

  • All VLSI EDA tools licenses under SMDP Chip to System Design Project are received and installed.
  • A MOU was signed by Director SGSITS, Indore, Director, CEERI Pilani and MIT,Government of India for Chip to System Design project running in E & I department.
 
 
 
 
3. ISTE -STTP (2 Week) on CMOS, Mixed Signal & Radio Frequency VLSI Design (30th Jan 2017 to 4th Feb 2017)
 
4. Vendor Training Program on Mentor Graphics (26th to 29th December 2016)
 
5. STC on Analog & Mixed signals System Design ( March 23-27 2015)
 
 

Get In Touch

Shri Govindram Seksaria Institute of Technology and Science

  • Add: 23 Sir M. Visvesvaraya Marg, Indore, Madhya Pradesh 452003
  • Tel: +91 - 731 - 2582100
  • Email: director[at]sgsits.ac.in  
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